Design of Integrated Circuits for Optical Communications	5
	Contents	9
	Preface to First Edition	15
	Preface	17
	About the Author	19
	1 Introduction to Optical Communications	21
	1.1 Brief History	21
	1.2 Generic Optical System	22
	1.3 Design Challenges	25
	1.4 State of the Art	26
	2 Basic Concepts	28
	2.1 Properties of Random Binary Data	28
	2.2 Generation of Random Data	32
	2.3 Data Formats	34
	2.3.1 NRZ and RZ Data	34
	2.3.2 8B/10B Coding	34
	2.4 Effect of Bandwidth Limitation on Random Data	36
	2.4.1 Effect of Low-Pass Filtering	36
	2.4.2 Eye Diagrams	36
	2.4.3 Effect of High-Pass Filtering	38
	2.5 Effect of Noise on Random Data	41
	2.6 Phase Noise and Jitter	44
	2.6.1 Phase Noise	44
	2.6.2 Jitter	47
	2.6.3 Relationship Between Phase Noise and Jitter	48
	2.6.4 Jitter Due to Additive Noise	48
	2.7 Transmission Lines	50
	2.7.1 Ideal Transmission Lines	50
	2.7.2 Lossy Transmission Lines	53
	3 Optical Devices	56
	3.1 Laser Diodes	56
	3.1.1 Operation of Lasers	58
	3.1.2 Types of Lasers	60
	3.1.3 Properties of Lasers	62
	3.1.4 External Modulation	65
	3.2 Optical Fibers	66
	3.2.1 Fiber Loss	67
	3.2.2 Fiber Dispersion	68
	3.3 Photodiodes	75
	3.3.1 Responsivity and Efficiency	75
	3.3.2 PIN Diodes	76
	3.3.3 Avalanche Photodiodes	77
	3.4 Optical Systems	78
	4 Transimpedance Amplifiers	82
	4.1 General Considerations	82
	4.1.1 TIA Performance Parameters	84
	4.1.2 SNR Calculations	89
	4.1.3 Noise Bandwidth	92
	4.2 Open-Loop TIAs	93
	4.2.1 Low-Frequency Behavior	93
	4.2.2 High-Frequency Behavior	101
	4.3 Feedback TIAs	107
	4.3.1 First-Order TIA	107
	4.3.2 Second-Order TIA	109
	4.4 Supply Rejection	117
	4.5 Differential TIAs	120
	4.6 High-Performance Techniques	123
	4.6.1 Gain Boosting	123
	4.6.2 Capacitive Coupling	125
	4.6.3 Feedback TIAs	126
	4.6.4 Inductive Peaking	130
	4.7 Automatic Gain Control	134
	4.8 Case Studies	138
	4.9 New Developments in TIA Design	142
	5 Limiting Amplifiers and Output Buffers	150
	5.1 General Considerations	150
	5.1.1 Performance Parameters	150
	5.1.2 Cascaded Gain Stages	152
	5.1.3 AM/PM Conversion	156
	5.2 Broadband Techniques	158
	5.2.1 Inductive Peaking	158
	5.2.2 Capacitive Degeneration	160
	5.2.3 Cherry-Hooper Amplifier	163
	5.2.4 fT Doublers	167
	5.3 Output Buffers	169
	5.3.1 Differential Signaling	169
	5.3.2 Double Termination	173
	5.3.3 Predriver Design	176
	5.4 Distributed Amplification	179
	5.4.1 Monolithic Transmission Lines	179
	5.4.2 Distributed Amplifiers	183
	5.4.3 Distributed Amplifiers with Lumped Devices	190
	5.5 Other Broadband Techniques	191
	5.5.1 T-Coil Peaking	191
	5.5.2 Negative Capacitance	194
	5.5.3 Active Feedback	198
	5.5.4 Triple-Resonance Peaking	200
	6 Oscillator Fundamentals	205
	6.1 General Considerations	205
	6.2 Ring Oscillators	207
	6.3 LC Oscillators	218
	6.3.1 Crossed-Coupled Oscillator	221
	6.3.2 Colpitts Oscillator	224
	6.3.3 One-Port Oscillators	227
	6.4 Voltage-Controlled Oscillators	231
	6.4.1 Tuning in Ring Oscillators	234
	6.4.2 Tuning in LC Oscillators	242
	6.5 Mathematical Model of VCOs	247
	7 LC Oscillators	253
	7.1 Monolithic Inductors	253
	7.1.1 Loss Mechanisms	255
	7.1.2 Inductor Modeling	259
	7.1.3 Inductor Design Guidelines	262
	7.2 Monolithic Varactors	266
	7.3 Basic LC Oscillators	268
	7.3.1 Differential Control	271
	7.3.2 Design Procedure	273
	7.4 Quadrature Oscillators	275
	7.4.1 In-Phase Coupling	277
	7.4.2 Antiphase Coupling	279
	7.5 Distributed Oscillators	281
	8 Phase-Locked Loops	284
	8.1 Simple PLL	284
	8.1.1 Phase Detector	284
	8.1.2 Basic PLL Topology	285
	8.1.3 Dynamics of Simple PLL	294
	8.2 Charge-Pump PLLs	300
	8.2.1 Problem of Lock Acquisition	301
	8.2.2 Phase/Frequency Detector and Charge Pump	302
	8.2.3 Basic Charge-Pump PLL	306
	8.3 Nonideal Effects in PLLs	313
	8.3.1 PFD/CP Nonidealities	313
	8.3.2 Jitter in PLLs	317
	8.4 Delay-Locked Loops	320
	8.5 Applications	322
	8.5.1 Frequency Multiplication and Synthesis	323
	8.5.2 Skew Reduction	325
	8.5.3 Jitter Reduction	326
	9 Clock and Data Recovery	328
	9.1 General Considerations	328
	9.2 Phase Detectors for Random Data	340
	9.2.1 Hogge Phase Detector	340
	9.2.2 Alexander Phase Detector	344
	9.2.3 Half-Rate Phase Detectors	349
	9.3 Frequency Detectors for Random Data	353
	9.4 CDR Architectures	358
	9.4.1 Full-Rate Referenceless Architecture	358
	9.4.2 Dual-VCO Architecture	359
	9.4.3 Dual-Loop Architecture with External Reference	361
	9.4.4 Quarter-Rate Phase Detectors	362
	9.5 Jitter in CDR Circuits	364
	9.5.1 Jitter Transfer	365
	9.5.2 Jitter Generation	369
	9.5.3 Jitter Tolerance	371
	10 Multiplexers and Laser Drivers	376
	10.1 Multiplexers	376
	10.1.1 2-to-1 MUX	376
	10.1.2 MUX Architectures	381
	10.2 Frequency Dividers	384
	10.2.1 Flipflop Dividers	384
	10.2.2 Miller Divider	392
	10.3 Laser and Modulator Drivers	394
	10.3.1 Performance Parameters	394
	10.4 Design Principles	398
	10.4.1 Power Control	404
	10.5 New Developments in Laser Driver Design	405
	11 Burst-Mode Circuits	413
	11.1 Passive Optical Networks	413
	11.2 Burst-Mode TIAs	415
	11.2.1 TIA with Top and Bottom Hold	416
	11.2.2 Burst-Mode TIA Variants	420
	11.2.3 Offset Correction in Limiting Amplifiers	422
	11.3 Burst-Mode CDR Circuits	424
	11.3.1 Effect of Finite Delays	425
	11.3.2 Effect of Frequency Mismatch and Offset	426
	11.3.3 Jitter Characteristics	430
	11.4 Alternative BM CDR Architectures	433
	Index	437